Majid Sabbagh


PhD candidate

Boston, MA, USA

Professional Skills

FPGA-based design
Xilinx/Aldec/Lattice design and debug software suites and hardware kits, high-level synthesis


Programming Languages and Platforms
Verilog, VHDL, C, C++, Python, Spark, Matlab/Octave, Spec-C, OpenCL, CUDA C, Linux Shell Scripting, Java, HTML


Embedded Systems and HW/SW co-design
Embedded Linux, Bare-metal C, pipelining, low-level driver development, memory-mapped registers, ADC-DAC, GPIO, high-performance ports, direct memory access, cache and shared memory coherency


ASIC-based design
Cadence design and verification software suites


Computer Security
Power, electromagnetic, and timing side-channel analysis, side-channel attack detection tools and countermeasures, anomaly detection


Computer Vision
Image reconstruction, background subtraction, object detection, face verification and recognition, image classification


Deep Learning
Fully-connected neural networks, convolutional neural networks, transfer learning, neural style transfer, hyperparameter tuning, regularization and optimization


Networks and Communication Systems
OSI model, wireless mobile networks, wireless channel energy sensing, visible light communication


Electronic Circuits
RF circuit design, power electronics, measurement instruments



Northeastern University
2014 - Current

Doctor of Philosophy in Computer Engineering

Research: Side-channel and fault attack detection and countermeasure

Advisor: Prof. Yunsi Fei

Northeastern University
2014 - 2016

Master of Science in Computer Engineering

M.Sc. Thesis: Accelerating Cardiac MRI Compressed Sensing Image Reconstruction using Graphics Processing Units

Advisor: Prof. Miriam Leeser, Co-advisor: Prof. Mehdi H. Moghari

Isfahan University of Technology
2008 - 2013

Bachelor of Science in Electrical Engineering

B.Sc. Final Project: The study of an E1 Transceiver function and its implementation on an FPGA

Advisor: Prof. Hossein Saidi, Co-advisor: Prof. Ali Ghiasian

Research Experiences

Northeastern University Energy-Efficient and Secure Systems Lab (NUEESS), Northeastern University
  • Performed correlation power analysis on AES-NI enabled AES encryption on an x86 Atom processor (on Intel Edison) to inspect its secret data leakages
  • Implemented cache timing attack on AES (evict+time) on Android platforms using Java and Android programming Analyzed L1 and LLC prime+probe attacks on x86 architectures
  • Created static and dynamic analysis tools for detecting cache timing attacks
  • Designed a novel software-only fault injection method against GPUs
Reconfigurable and GPU Computing Laboratory (RCL), Northeastern University
  • Analyzing and Accelerating the 3D Cardiac MRI Compressed Sensing image reconstruction (RCL-Boston Children's Hospital)
  • Developing a real-time wireless channel energy sensing FPGA-based platform
Embedded Systems Lab (ESL), Northeastern University
  • Analyzing and Implementing a Real-time Object Tracking Vision Flow using Xilinx Zynq SoC
  • Studying background subtraction architectures and applying various data compression methods to the (adaptive) model data and evaluating the performance-quality trade-off

Work Experiences

Intel Corporation - IPAS
June 2019 - Aug. 2019

Intel Product Assurance and Security (IPAS) team’s scope is providing unparalleled security, privacy and assurance of Intel products. There in the Offensive Security Research (OSR) team, we designed an on-the-go (integrated) physical attack lab to evaluate implementation attacks on FPGAs.

Analog Devices (ADI) - Analog Garage
May 2018 - Aug. 2018

The Analog Garage is part of ADI which focuses on future technologies and innovation. There I was in the Trusted Security Solutions (TSS) team where we designed and synthesized a secure hardware accelerator for Elliptic Curve Cryptography (ECC) as an ASIC IP core.

VLNcomm LLC.
June 2015 - Aug. 2015 & May 2016 - Aug. 2016

VLNComm is developing a new technology for indoor wireless networking called Visible Light Communication (VLC). There I led a hardware-design team to prototype a novel visible light communication system using custom designed HW/SW systems.